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UART Baudrate Error Budget
N9WXU posted a topic in The LoungeI was reviewing a Cypress data sheet for the CYW4390 and saw a line in the UART chapter saying that the total baud rate error budget for both ends had to be less than 2%. With a large dependence upon internal oscillators these days, it seemed a good time to discuss these error budgets. Is 2% reasonable or conservative? First here is a quick back of the envelope calculation for link budget for UARTS. I will assume "perfect" rise & fall times, and 8, none, 1(8n1) framing. There are a total of 10 bits in a byte with 8n1 so each bit is 10% of the total byte time. If your link budget is larger than 10%, you will miss a bit. BUT WAIT... all UART implementations I am aware of try to sample in the center of the bit. Generally, this is done by oversampling 16x and using the center 3 samples as a majority detect. If you consider that slipping the byte time by 1/2 a bit time will cause a missed bit, our link budget is now 5%. If you KNOW you are talking to a PERFECT receiver, then you can accept the entire 5% error. (Of course, you can assume your design is perfect and pass the blame to the other side, but then you would not be reading this.). I am sure that perfect transmitters & receivers are not possible, so we shall reasonably accept 1/2 the responsibility for the link budget, making our baud rate error specification 2.5%. Hmm. Something still seems rotten. The data sheet states that the TOTAL budget is 2%. Our envelope scribblings say 5%. What gives? Here is a good writeup by Maxim Integrated (https://www.maximintegrated.com/en/app-notes/index.mvp/id/2141) that adds some more details. Essentially, you have an uncertainty of ±1 sample-time detecting the START bit and a terrible link would have a 50% chance of detecting the midpoint of the stop bit. The short of the story is a ±3 sample-time error budget out of a needed 152 sample-times (160 sample times less 1/2 a bit time) or ±2% error budget for the link. That assumes you are over sampling 16x. On a PICmicrocontroller, the UART has a high speed mode (BRGH = 1) which changes the sampling rate to x4 instead of x16. This can have a profound effect on the error budget due to the ±1 bit sampling uncertainty. So here are a few recommendations: 1) Always use the MAXIMUM sampling rate available in your UART. 2) Consider a crystal (20ppm) or a resonator (0.5%) or if you must use an internal oscillator, I hope your temperature & power supply is stable so your oscillator accuracy is good. 3) Consider using the auto baud features and internal oscillator tuning features if they are available in your controller. Good Luck